54#define POW_2_32 (4294967296.0)
55#define NEG_POW_2_32 (-4294967296.0)
71 elog(
ERROR,
"bit width must be between 4 and 16 inclusive");
89 switch (
cState->nRegisters)
101 alpha = 0.7213 / (1.0 + 1.079 /
cState->nRegisters);
198 result =
cState->alphaMM / sum;
200 if (result <= (5.0 / 2.0) *
cState->nRegisters)
215 else if (result > (1.0 / 30.0) *
POW_2_32)
#define Assert(condition)
void initHyperLogLog(hyperLogLogState *cState, uint8 bwidth)
void initHyperLogLogError(hyperLogLogState *cState, double error)
static uint8 rho(uint32 x, uint8 b)
double estimateHyperLogLog(hyperLogLogState *cState)
void addHyperLogLog(hyperLogLogState *cState, uint32 hash)
void freeHyperLogLog(hyperLogLogState *cState)
void pfree(void *pointer)
void * palloc0(Size size)
static int pg_leftmost_one_pos32(uint32 word)
static unsigned hash(unsigned *uv, int n)