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arch-ppc.h
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1 /*-------------------------------------------------------------------------
2  *
3  * arch-ppc.h
4  * Atomic operations considerations specific to PowerPC
5  *
6  * Portions Copyright (c) 1996-2018, PostgreSQL Global Development Group
7  * Portions Copyright (c) 1994, Regents of the University of California
8  *
9  * NOTES:
10  *
11  * src/include/port/atomics/arch-ppc.h
12  *
13  *-------------------------------------------------------------------------
14  */
15 
16 #if defined(__GNUC__)
17 
18 /*
19  * lwsync orders loads with respect to each other, and similarly with stores.
20  * But a load can be performed before a subsequent store, so sync must be used
21  * for a full memory barrier.
22  */
23 #define pg_memory_barrier_impl() __asm__ __volatile__ ("sync" : : : "memory")
24 #define pg_read_barrier_impl() __asm__ __volatile__ ("lwsync" : : : "memory")
25 #define pg_write_barrier_impl() __asm__ __volatile__ ("lwsync" : : : "memory")
26 #endif
27 
28 /* per architecture manual doubleword accesses have single copy atomicity */
29 #define PG_HAVE_8BYTE_SINGLE_COPY_ATOMICITY