atomics.c File Reference

#include "postgres.h"
#include "miscadmin.h"
#include "port/atomics.h"
#include "storage/spin.h"
#include <signal.h>

Include dependency graph for atomics.c:

Go to the source code of this file.

Functions
void	pg_spinlock_barrier (void)
void	pg_extern_compiler_barrier (void)
void	pg_atomic_init_flag_impl (volatile pg_atomic_flag *ptr)
bool	pg_atomic_test_set_flag_impl (volatile pg_atomic_flag *ptr)
void	pg_atomic_clear_flag_impl (volatile pg_atomic_flag *ptr)
bool	pg_atomic_unlocked_test_flag_impl (volatile pg_atomic_flag *ptr)
void	pg_atomic_init_u32_impl (volatile pg_atomic_uint32 *ptr, uint32 val_)
void	pg_atomic_write_u32_impl (volatile pg_atomic_uint32 *ptr, uint32 val)
bool	pg_atomic_compare_exchange_u32_impl (volatile pg_atomic_uint32 *ptr, uint32 *expected, uint32 newval)
uint32	pg_atomic_fetch_add_u32_impl (volatile pg_atomic_uint32 *ptr, int32 add_)
void	pg_atomic_init_u64_impl (volatile pg_atomic_uint64 *ptr, uint64 val_)
bool	pg_atomic_compare_exchange_u64_impl (volatile pg_atomic_uint64 *ptr, uint64 *expected, uint64 newval)
uint64	pg_atomic_fetch_add_u64_impl (volatile pg_atomic_uint64 *ptr, int64 add_)

Function Documentation

pg_atomic_clear_flag_impl()

void pg_atomic_clear_flag_impl

(

volatile pg_atomic_flag *

ptr

)

Definition at line 89 of file atomics.c.

{
    SpinLockAcquire((slock_t *) &ptr->sema);
    ptr->value = false;
    SpinLockRelease((slock_t *) &ptr->sema);
}

References pg_atomic_flag::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_flag::value.

Referenced by pg_atomic_clear_flag().

pg_atomic_compare_exchange_u32_impl()

bool pg_atomic_compare_exchange_u32_impl	(	volatile pg_atomic_uint32 *	ptr,
		uint32 *	expected,
		uint32	newval
	)

Definition at line 137 of file atomics.c.

{
    bool        ret;
 
    /*
     * Do atomic op under a spinlock. It might look like we could just skip
     * the cmpxchg if the lock isn't available, but that'd just emulate a
     * 'weak' compare and swap. I.e. one that allows spurious failures. Since
     * several algorithms rely on a strong variant and that is efficiently
     * implementable on most major architectures let's emulate it here as
     * well.
     */
    SpinLockAcquire((slock_t *) &ptr->sema);
 
    /* perform compare/exchange logic */
    ret = ptr->value == *expected;
    *expected = ptr->value;
    if (ret)
        ptr->value = newval;
 
    /* and release lock */
    SpinLockRelease((slock_t *) &ptr->sema);
 
    return ret;
}

References newval, pg_atomic_uint32::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_uint32::value.

Referenced by pg_atomic_compare_exchange_u32().

pg_atomic_compare_exchange_u64_impl()

bool pg_atomic_compare_exchange_u64_impl	(	volatile pg_atomic_uint64 *	ptr,
		uint64 *	expected,
		uint64	newval
	)

Definition at line 200 of file atomics.c.

{
    bool        ret;
 
    /*
     * Do atomic op under a spinlock. It might look like we could just skip
     * the cmpxchg if the lock isn't available, but that'd just emulate a
     * 'weak' compare and swap. I.e. one that allows spurious failures. Since
     * several algorithms rely on a strong variant and that is efficiently
     * implementable on most major architectures let's emulate it here as
     * well.
     */
    SpinLockAcquire((slock_t *) &ptr->sema);
 
    /* perform compare/exchange logic */
    ret = ptr->value == *expected;
    *expected = ptr->value;
    if (ret)
        ptr->value = newval;
 
    /* and release lock */
    SpinLockRelease((slock_t *) &ptr->sema);
 
    return ret;
}

References newval, pg_atomic_uint64::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_uint64::value.

Referenced by pg_atomic_compare_exchange_u64(), pg_atomic_monotonic_advance_u64(), and pg_atomic_read_u64_impl().

pg_atomic_fetch_add_u32_impl()

uint32 pg_atomic_fetch_add_u32_impl	(	volatile pg_atomic_uint32 *	ptr,
		int32	add_
	)

Definition at line 165 of file atomics.c.

{
    uint32      oldval;
 
    SpinLockAcquire((slock_t *) &ptr->sema);
    oldval = ptr->value;
    ptr->value += add_;
    SpinLockRelease((slock_t *) &ptr->sema);
    return oldval;
}

References pg_atomic_uint32::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_uint32::value.

Referenced by pg_atomic_fetch_add_u32().

pg_atomic_fetch_add_u64_impl()

uint64 pg_atomic_fetch_add_u64_impl	(	volatile pg_atomic_uint64 *	ptr,
		int64	add_
	)

Definition at line 228 of file atomics.c.

{
    uint64      oldval;
 
    SpinLockAcquire((slock_t *) &ptr->sema);
    oldval = ptr->value;
    ptr->value += add_;
    SpinLockRelease((slock_t *) &ptr->sema);
    return oldval;
}

References pg_atomic_uint64::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_uint64::value.

Referenced by pg_atomic_fetch_add_u64().

pg_atomic_init_flag_impl()

void pg_atomic_init_flag_impl

(

volatile pg_atomic_flag *

ptr

)

Definition at line 55 of file atomics.c.

{
    StaticAssertDecl(sizeof(ptr->sema) >= sizeof(slock_t),
                     "size mismatch of atomic_flag vs slock_t");
 
#ifndef HAVE_SPINLOCKS
 
    /*
     * NB: If we're using semaphore based TAS emulation, be careful to use a
     * separate set of semaphores. Otherwise we'd get in trouble if an atomic
     * var would be manipulated while spinlock is held.
     */
    s_init_lock_sema((slock_t *) &ptr->sema, true);
#else
    SpinLockInit((slock_t *) &ptr->sema);
#endif
 
    ptr->value = false;
}

References s_init_lock_sema(), pg_atomic_flag::sema, SpinLockInit, StaticAssertDecl, and pg_atomic_flag::value.

Referenced by pg_atomic_init_flag().

pg_atomic_init_u32_impl()

void pg_atomic_init_u32_impl	(	volatile pg_atomic_uint32 *	ptr,
		uint32	val_
	)

Definition at line 106 of file atomics.c.

{
    StaticAssertDecl(sizeof(ptr->sema) >= sizeof(slock_t),
                     "size mismatch of atomic_uint32 vs slock_t");
 
    /*
     * If we're using semaphore based atomic flags, be careful about nested
     * usage of atomics while a spinlock is held.
     */
#ifndef HAVE_SPINLOCKS
    s_init_lock_sema((slock_t *) &ptr->sema, true);
#else
    SpinLockInit((slock_t *) &ptr->sema);
#endif
    ptr->value = val_;
}

References s_init_lock_sema(), pg_atomic_uint32::sema, SpinLockInit, StaticAssertDecl, and pg_atomic_uint32::value.

Referenced by pg_atomic_init_u32().

pg_atomic_init_u64_impl()

void pg_atomic_init_u64_impl	(	volatile pg_atomic_uint64 *	ptr,
		uint64	val_
	)

Definition at line 182 of file atomics.c.

{
    StaticAssertDecl(sizeof(ptr->sema) >= sizeof(slock_t),
                     "size mismatch of atomic_uint64 vs slock_t");
 
    /*
     * If we're using semaphore based atomic flags, be careful about nested
     * usage of atomics while a spinlock is held.
     */
#ifndef HAVE_SPINLOCKS
    s_init_lock_sema((slock_t *) &ptr->sema, true);
#else
    SpinLockInit((slock_t *) &ptr->sema);
#endif
    ptr->value = val_;
}

References s_init_lock_sema(), pg_atomic_uint64::sema, SpinLockInit, StaticAssertDecl, and pg_atomic_uint64::value.

Referenced by pg_atomic_init_u64().

pg_atomic_test_set_flag_impl()

bool pg_atomic_test_set_flag_impl

(

volatile pg_atomic_flag *

ptr

)

Definition at line 76 of file atomics.c.

{
    uint32      oldval;
 
    SpinLockAcquire((slock_t *) &ptr->sema);
    oldval = ptr->value;
    ptr->value = true;
    SpinLockRelease((slock_t *) &ptr->sema);
 
    return oldval == 0;
}

References pg_atomic_flag::sema, SpinLockAcquire, SpinLockRelease, and pg_atomic_flag::value.

Referenced by pg_atomic_test_set_flag().

pg_atomic_unlocked_test_flag_impl()

bool pg_atomic_unlocked_test_flag_impl

(

volatile pg_atomic_flag *

ptr

)

Definition at line 97 of file atomics.c.

{
    return ptr->value == 0;
}

References pg_atomic_flag::value.

Referenced by pg_atomic_unlocked_test_flag().

pg_atomic_write_u32_impl()

void pg_atomic_write_u32_impl	(	volatile pg_atomic_uint32 *	ptr,
		uint32	val
	)

Definition at line 124 of file atomics.c.

{
    /*
     * One might think that an unlocked write doesn't need to acquire the
     * spinlock, but one would be wrong. Even an unlocked write has to cause a
     * concurrent pg_atomic_compare_exchange_u32() (et al) to fail.
     */
    SpinLockAcquire((slock_t *) &ptr->sema);
    ptr->value = val;
    SpinLockRelease((slock_t *) &ptr->sema);
}

References pg_atomic_uint32::sema, SpinLockAcquire, SpinLockRelease, val, and pg_atomic_uint32::value.

Referenced by pg_atomic_write_u32().

pg_extern_compiler_barrier()

void pg_extern_compiler_barrier

(

void

)

Definition at line 45 of file atomics.c.

{
    /* do nothing */
}

pg_spinlock_barrier()

void pg_spinlock_barrier

(

void

)

Definition at line 29 of file atomics.c.

{
    /*
     * NB: we have to be reentrant here, some barriers are placed in signal
     * handlers.
     *
     * We use kill(0) for the fallback barrier as we assume that kernels on
     * systems old enough to require fallback barrier support will include an
     * appropriate barrier while checking the existence of the postmaster pid.
     */
    (void) kill(PostmasterPid, 0);
}

References kill, and PostmasterPid.